State-of-the-art data acquisition and associated readout and trigger (DART) systems provide the high-rate and high-throughput signal processing, event selection, and data collection critical to nearly every forefront particle physics experiment.
Faculty and lab scientists on HEPCAT lead DART projects on energy and intensity frontiers worldwide experiments such as
University Mentors:
- Javier Duarte (UC San Diego)
- Robin Erbacher (UC Davis)
- Andrew Lankford (UC Irvine)
- Michael Mulhearn (UC Davis)
- Harvey B. Newman (Caltech)
- Maria Spiropulu (Caltech)
- Anyes Taffard (UC Irvine)
- Lauren Tompkins (Stanford)
Laboratory Mentors:
- Rainer Bartoldus (SLAC)
- Carl Grace (LBNL)
- Ryan Herbst (SLAC)
- Michael Kagan (SLAC)
- Kenny (SLAC)
- Dong Su (SLAC)
Graduate students involved in this program will:
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- Design, develop, validate, integrate and monitor DART systems from their early inception to their final product operating on an experiment
- Apply new technologies to find innovative solutions to problems in particle physics
- Develop technical skills:
- Develop firmware and software using the latest advanced technology to meet experimental challenges
- Continuous integration and continuous development workflows for large scale code base project
- Hands-on experience with state-of-the-art DART systems to bring them into operation
- System design and project management
- Fundamental of particles interaction with matter to produce signals, measure those signals and reconstruct physical quantities at the foundation of scientific analyses
- Interact with leading experts in particle physics, electrical engineers and technicians developing DART systems in forefront particle experiments
- Work in collaborative environment
- Design, develop, validate, integrate and monitor DART systems from their early inception to their final product operating on an experiment
Projects on these experiments used advance technologies:
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- FPGAs, Zynq SoC, heterogenous platforms, ASICs
- High-speed links and modern hardware protocols: I2C, SPI, AXI
- New tools allowing higher level of abstraction across Xilinx or Intel hardware platforms: High-Level Synthesis such as Xilinx Vitis, Intel oneAPI, SYCL
- Machine learning algorithms to operate on FPGAs